Program Listing for File pio_interrupt_cluster.h#
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#pragma once
#ifndef RP2040_STRUCTS_PIO_INTERRUPT_CLUSTER_H
#define RP2040_STRUCTS_PIO_INTERRUPT_CLUSTER_H
#include "../ifgen/common.h"
namespace RP2040
{
struct pio_interrupt_cluster
{
/* Constant attributes. */
static constexpr struct_id_t id =
14;
static constexpr std::size_t size =
12;
/* Fields. */
uint32_t INTE;
uint32_t INTF;
const uint32_t INTS = {};
/* Methods. */
inline bool get_INTE_SM0_RXNEMPTY() volatile
{
return INTE & 1u;
}
inline void set_INTE_SM0_RXNEMPTY() volatile
{
INTE |= 1u;
}
inline void clear_INTE_SM0_RXNEMPTY() volatile
{
INTE &= ~(1u);
}
inline void toggle_INTE_SM0_RXNEMPTY() volatile
{
INTE ^= 1u;
}
inline bool get_INTE_SM1_RXNEMPTY() volatile
{
return INTE & (1u << 1u);
}
inline void set_INTE_SM1_RXNEMPTY() volatile
{
INTE |= 1u << 1u;
}
inline void clear_INTE_SM1_RXNEMPTY() volatile
{
INTE &= ~(1u << 1u);
}
inline void toggle_INTE_SM1_RXNEMPTY() volatile
{
INTE ^= 1u << 1u;
}
inline bool get_INTE_SM2_RXNEMPTY() volatile
{
return INTE & (1u << 2u);
}
inline void set_INTE_SM2_RXNEMPTY() volatile
{
INTE |= 1u << 2u;
}
inline void clear_INTE_SM2_RXNEMPTY() volatile
{
INTE &= ~(1u << 2u);
}
inline void toggle_INTE_SM2_RXNEMPTY() volatile
{
INTE ^= 1u << 2u;
}
inline bool get_INTE_SM3_RXNEMPTY() volatile
{
return INTE & (1u << 3u);
}
inline void set_INTE_SM3_RXNEMPTY() volatile
{
INTE |= 1u << 3u;
}
inline void clear_INTE_SM3_RXNEMPTY() volatile
{
INTE &= ~(1u << 3u);
}
inline void toggle_INTE_SM3_RXNEMPTY() volatile
{
INTE ^= 1u << 3u;
}
inline bool get_INTE_SM0_TXNFULL() volatile
{
return INTE & (1u << 4u);
}
inline void set_INTE_SM0_TXNFULL() volatile
{
INTE |= 1u << 4u;
}
inline void clear_INTE_SM0_TXNFULL() volatile
{
INTE &= ~(1u << 4u);
}
inline void toggle_INTE_SM0_TXNFULL() volatile
{
INTE ^= 1u << 4u;
}
inline bool get_INTE_SM1_TXNFULL() volatile
{
return INTE & (1u << 5u);
}
inline void set_INTE_SM1_TXNFULL() volatile
{
INTE |= 1u << 5u;
}
inline void clear_INTE_SM1_TXNFULL() volatile
{
INTE &= ~(1u << 5u);
}
inline void toggle_INTE_SM1_TXNFULL() volatile
{
INTE ^= 1u << 5u;
}
inline bool get_INTE_SM2_TXNFULL() volatile
{
return INTE & (1u << 6u);
}
inline void set_INTE_SM2_TXNFULL() volatile
{
INTE |= 1u << 6u;
}
inline void clear_INTE_SM2_TXNFULL() volatile
{
INTE &= ~(1u << 6u);
}
inline void toggle_INTE_SM2_TXNFULL() volatile
{
INTE ^= 1u << 6u;
}
inline bool get_INTE_SM3_TXNFULL() volatile
{
return INTE & (1u << 7u);
}
inline void set_INTE_SM3_TXNFULL() volatile
{
INTE |= 1u << 7u;
}
inline void clear_INTE_SM3_TXNFULL() volatile
{
INTE &= ~(1u << 7u);
}
inline void toggle_INTE_SM3_TXNFULL() volatile
{
INTE ^= 1u << 7u;
}
inline bool get_INTE_SM0() volatile
{
return INTE & (1u << 8u);
}
inline void set_INTE_SM0() volatile
{
INTE |= 1u << 8u;
}
inline void clear_INTE_SM0() volatile
{
INTE &= ~(1u << 8u);
}
inline void toggle_INTE_SM0() volatile
{
INTE ^= 1u << 8u;
}
inline bool get_INTE_SM1() volatile
{
return INTE & (1u << 9u);
}
inline void set_INTE_SM1() volatile
{
INTE |= 1u << 9u;
}
inline void clear_INTE_SM1() volatile
{
INTE &= ~(1u << 9u);
}
inline void toggle_INTE_SM1() volatile
{
INTE ^= 1u << 9u;
}
inline bool get_INTE_SM2() volatile
{
return INTE & (1u << 10u);
}
inline void set_INTE_SM2() volatile
{
INTE |= 1u << 10u;
}
inline void clear_INTE_SM2() volatile
{
INTE &= ~(1u << 10u);
}
inline void toggle_INTE_SM2() volatile
{
INTE ^= 1u << 10u;
}
inline bool get_INTE_SM3() volatile
{
return INTE & (1u << 11u);
}
inline void set_INTE_SM3() volatile
{
INTE |= 1u << 11u;
}
inline void clear_INTE_SM3() volatile
{
INTE &= ~(1u << 11u);
}
inline void toggle_INTE_SM3() volatile
{
INTE ^= 1u << 11u;
}
inline void get_INTE(bool &SM0_RXNEMPTY, bool &SM1_RXNEMPTY,
bool &SM2_RXNEMPTY, bool &SM3_RXNEMPTY,
bool &SM0_TXNFULL, bool &SM1_TXNFULL,
bool &SM2_TXNFULL, bool &SM3_TXNFULL, bool &SM0,
bool &SM1, bool &SM2, bool &SM3) volatile
{
uint32_t curr = INTE;
SM0_RXNEMPTY = curr & 1u;
SM1_RXNEMPTY = curr & (1u << 1u);
SM2_RXNEMPTY = curr & (1u << 2u);
SM3_RXNEMPTY = curr & (1u << 3u);
SM0_TXNFULL = curr & (1u << 4u);
SM1_TXNFULL = curr & (1u << 5u);
SM2_TXNFULL = curr & (1u << 6u);
SM3_TXNFULL = curr & (1u << 7u);
SM0 = curr & (1u << 8u);
SM1 = curr & (1u << 9u);
SM2 = curr & (1u << 10u);
SM3 = curr & (1u << 11u);
}
inline void set_INTE(bool SM0_RXNEMPTY, bool SM1_RXNEMPTY,
bool SM2_RXNEMPTY, bool SM3_RXNEMPTY,
bool SM0_TXNFULL, bool SM1_TXNFULL, bool SM2_TXNFULL,
bool SM3_TXNFULL, bool SM0, bool SM1, bool SM2,
bool SM3) volatile
{
uint32_t curr = INTE;
curr &= ~(0b1u);
curr |= (SM0_RXNEMPTY & 0b1u);
curr &= ~(0b1u << 1u);
curr |= (SM1_RXNEMPTY & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (SM2_RXNEMPTY & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (SM3_RXNEMPTY & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (SM0_TXNFULL & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (SM1_TXNFULL & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (SM2_TXNFULL & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (SM3_TXNFULL & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (SM0 & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (SM1 & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (SM2 & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (SM3 & 0b1u) << 11u;
INTE = curr;
}
inline bool get_INTF_SM0_RXNEMPTY() volatile
{
return INTF & 1u;
}
inline void set_INTF_SM0_RXNEMPTY() volatile
{
INTF |= 1u;
}
inline void clear_INTF_SM0_RXNEMPTY() volatile
{
INTF &= ~(1u);
}
inline void toggle_INTF_SM0_RXNEMPTY() volatile
{
INTF ^= 1u;
}
inline bool get_INTF_SM1_RXNEMPTY() volatile
{
return INTF & (1u << 1u);
}
inline void set_INTF_SM1_RXNEMPTY() volatile
{
INTF |= 1u << 1u;
}
inline void clear_INTF_SM1_RXNEMPTY() volatile
{
INTF &= ~(1u << 1u);
}
inline void toggle_INTF_SM1_RXNEMPTY() volatile
{
INTF ^= 1u << 1u;
}
inline bool get_INTF_SM2_RXNEMPTY() volatile
{
return INTF & (1u << 2u);
}
inline void set_INTF_SM2_RXNEMPTY() volatile
{
INTF |= 1u << 2u;
}
inline void clear_INTF_SM2_RXNEMPTY() volatile
{
INTF &= ~(1u << 2u);
}
inline void toggle_INTF_SM2_RXNEMPTY() volatile
{
INTF ^= 1u << 2u;
}
inline bool get_INTF_SM3_RXNEMPTY() volatile
{
return INTF & (1u << 3u);
}
inline void set_INTF_SM3_RXNEMPTY() volatile
{
INTF |= 1u << 3u;
}
inline void clear_INTF_SM3_RXNEMPTY() volatile
{
INTF &= ~(1u << 3u);
}
inline void toggle_INTF_SM3_RXNEMPTY() volatile
{
INTF ^= 1u << 3u;
}
inline bool get_INTF_SM0_TXNFULL() volatile
{
return INTF & (1u << 4u);
}
inline void set_INTF_SM0_TXNFULL() volatile
{
INTF |= 1u << 4u;
}
inline void clear_INTF_SM0_TXNFULL() volatile
{
INTF &= ~(1u << 4u);
}
inline void toggle_INTF_SM0_TXNFULL() volatile
{
INTF ^= 1u << 4u;
}
inline bool get_INTF_SM1_TXNFULL() volatile
{
return INTF & (1u << 5u);
}
inline void set_INTF_SM1_TXNFULL() volatile
{
INTF |= 1u << 5u;
}
inline void clear_INTF_SM1_TXNFULL() volatile
{
INTF &= ~(1u << 5u);
}
inline void toggle_INTF_SM1_TXNFULL() volatile
{
INTF ^= 1u << 5u;
}
inline bool get_INTF_SM2_TXNFULL() volatile
{
return INTF & (1u << 6u);
}
inline void set_INTF_SM2_TXNFULL() volatile
{
INTF |= 1u << 6u;
}
inline void clear_INTF_SM2_TXNFULL() volatile
{
INTF &= ~(1u << 6u);
}
inline void toggle_INTF_SM2_TXNFULL() volatile
{
INTF ^= 1u << 6u;
}
inline bool get_INTF_SM3_TXNFULL() volatile
{
return INTF & (1u << 7u);
}
inline void set_INTF_SM3_TXNFULL() volatile
{
INTF |= 1u << 7u;
}
inline void clear_INTF_SM3_TXNFULL() volatile
{
INTF &= ~(1u << 7u);
}
inline void toggle_INTF_SM3_TXNFULL() volatile
{
INTF ^= 1u << 7u;
}
inline bool get_INTF_SM0() volatile
{
return INTF & (1u << 8u);
}
inline void set_INTF_SM0() volatile
{
INTF |= 1u << 8u;
}
inline void clear_INTF_SM0() volatile
{
INTF &= ~(1u << 8u);
}
inline void toggle_INTF_SM0() volatile
{
INTF ^= 1u << 8u;
}
inline bool get_INTF_SM1() volatile
{
return INTF & (1u << 9u);
}
inline void set_INTF_SM1() volatile
{
INTF |= 1u << 9u;
}
inline void clear_INTF_SM1() volatile
{
INTF &= ~(1u << 9u);
}
inline void toggle_INTF_SM1() volatile
{
INTF ^= 1u << 9u;
}
inline bool get_INTF_SM2() volatile
{
return INTF & (1u << 10u);
}
inline void set_INTF_SM2() volatile
{
INTF |= 1u << 10u;
}
inline void clear_INTF_SM2() volatile
{
INTF &= ~(1u << 10u);
}
inline void toggle_INTF_SM2() volatile
{
INTF ^= 1u << 10u;
}
inline bool get_INTF_SM3() volatile
{
return INTF & (1u << 11u);
}
inline void set_INTF_SM3() volatile
{
INTF |= 1u << 11u;
}
inline void clear_INTF_SM3() volatile
{
INTF &= ~(1u << 11u);
}
inline void toggle_INTF_SM3() volatile
{
INTF ^= 1u << 11u;
}
inline void get_INTF(bool &SM0_RXNEMPTY, bool &SM1_RXNEMPTY,
bool &SM2_RXNEMPTY, bool &SM3_RXNEMPTY,
bool &SM0_TXNFULL, bool &SM1_TXNFULL,
bool &SM2_TXNFULL, bool &SM3_TXNFULL, bool &SM0,
bool &SM1, bool &SM2, bool &SM3) volatile
{
uint32_t curr = INTF;
SM0_RXNEMPTY = curr & 1u;
SM1_RXNEMPTY = curr & (1u << 1u);
SM2_RXNEMPTY = curr & (1u << 2u);
SM3_RXNEMPTY = curr & (1u << 3u);
SM0_TXNFULL = curr & (1u << 4u);
SM1_TXNFULL = curr & (1u << 5u);
SM2_TXNFULL = curr & (1u << 6u);
SM3_TXNFULL = curr & (1u << 7u);
SM0 = curr & (1u << 8u);
SM1 = curr & (1u << 9u);
SM2 = curr & (1u << 10u);
SM3 = curr & (1u << 11u);
}
inline void set_INTF(bool SM0_RXNEMPTY, bool SM1_RXNEMPTY,
bool SM2_RXNEMPTY, bool SM3_RXNEMPTY,
bool SM0_TXNFULL, bool SM1_TXNFULL, bool SM2_TXNFULL,
bool SM3_TXNFULL, bool SM0, bool SM1, bool SM2,
bool SM3) volatile
{
uint32_t curr = INTF;
curr &= ~(0b1u);
curr |= (SM0_RXNEMPTY & 0b1u);
curr &= ~(0b1u << 1u);
curr |= (SM1_RXNEMPTY & 0b1u) << 1u;
curr &= ~(0b1u << 2u);
curr |= (SM2_RXNEMPTY & 0b1u) << 2u;
curr &= ~(0b1u << 3u);
curr |= (SM3_RXNEMPTY & 0b1u) << 3u;
curr &= ~(0b1u << 4u);
curr |= (SM0_TXNFULL & 0b1u) << 4u;
curr &= ~(0b1u << 5u);
curr |= (SM1_TXNFULL & 0b1u) << 5u;
curr &= ~(0b1u << 6u);
curr |= (SM2_TXNFULL & 0b1u) << 6u;
curr &= ~(0b1u << 7u);
curr |= (SM3_TXNFULL & 0b1u) << 7u;
curr &= ~(0b1u << 8u);
curr |= (SM0 & 0b1u) << 8u;
curr &= ~(0b1u << 9u);
curr |= (SM1 & 0b1u) << 9u;
curr &= ~(0b1u << 10u);
curr |= (SM2 & 0b1u) << 10u;
curr &= ~(0b1u << 11u);
curr |= (SM3 & 0b1u) << 11u;
INTF = curr;
}
inline bool get_INTS_SM0_RXNEMPTY() volatile
{
return INTS & 1u;
}
inline bool get_INTS_SM1_RXNEMPTY() volatile
{
return INTS & (1u << 1u);
}
inline bool get_INTS_SM2_RXNEMPTY() volatile
{
return INTS & (1u << 2u);
}
inline bool get_INTS_SM3_RXNEMPTY() volatile
{
return INTS & (1u << 3u);
}
inline bool get_INTS_SM0_TXNFULL() volatile
{
return INTS & (1u << 4u);
}
inline bool get_INTS_SM1_TXNFULL() volatile
{
return INTS & (1u << 5u);
}
inline bool get_INTS_SM2_TXNFULL() volatile
{
return INTS & (1u << 6u);
}
inline bool get_INTS_SM3_TXNFULL() volatile
{
return INTS & (1u << 7u);
}
inline bool get_INTS_SM0() volatile
{
return INTS & (1u << 8u);
}
inline bool get_INTS_SM1() volatile
{
return INTS & (1u << 9u);
}
inline bool get_INTS_SM2() volatile
{
return INTS & (1u << 10u);
}
inline bool get_INTS_SM3() volatile
{
return INTS & (1u << 11u);
}
inline void get_INTS(bool &SM0_RXNEMPTY, bool &SM1_RXNEMPTY,
bool &SM2_RXNEMPTY, bool &SM3_RXNEMPTY,
bool &SM0_TXNFULL, bool &SM1_TXNFULL,
bool &SM2_TXNFULL, bool &SM3_TXNFULL, bool &SM0,
bool &SM1, bool &SM2, bool &SM3) volatile
{
uint32_t curr = INTS;
SM0_RXNEMPTY = curr & 1u;
SM1_RXNEMPTY = curr & (1u << 1u);
SM2_RXNEMPTY = curr & (1u << 2u);
SM3_RXNEMPTY = curr & (1u << 3u);
SM0_TXNFULL = curr & (1u << 4u);
SM1_TXNFULL = curr & (1u << 5u);
SM2_TXNFULL = curr & (1u << 6u);
SM3_TXNFULL = curr & (1u << 7u);
SM0 = curr & (1u << 8u);
SM1 = curr & (1u << 9u);
SM2 = curr & (1u << 10u);
SM3 = curr & (1u << 11u);
}
};
static_assert(sizeof(pio_interrupt_cluster) == pio_interrupt_cluster::size);
static_assert(ifgen_struct<pio_interrupt_cluster>);
static volatile pio_interrupt_cluster *const PIO_INTERRUPT_CLUSTER_NULL =
reinterpret_cast<pio_interrupt_cluster *>(0x00000000);
}; // namespace RP2040
#endif