Struct pio_sm

inline uint8_t get_CLKDIV_FRAC() volatile#

Get CLKDIV’s FRAC field.

Fractional part of clock divisor

inline void set_CLKDIV_FRAC(uint8_t value) volatile#

Set CLKDIV’s FRAC field.

Fractional part of clock divisor

inline uint16_t get_CLKDIV_INT() volatile#

Get CLKDIV’s INT field.

Effective frequency is sysclk/(int + frac/256). Value of 0 is interpreted as 65536. If INT is 0, FRAC must also be 0.

inline void set_CLKDIV_INT(uint16_t value) volatile#

Set CLKDIV’s INT field.

Effective frequency is sysclk/(int + frac/256). Value of 0 is interpreted as 65536. If INT is 0, FRAC must also be 0.

inline void get_CLKDIV(uint8_t &FRAC, uint16_t &INT) volatile#

Get all of CLKDIV’s bit fields.

(read-write) Clock divisor register for state machine N Frequency = clock freq / (CLKDIV_INT + CLKDIV_FRAC / 256)

inline void set_CLKDIV(uint8_t FRAC, uint16_t INT) volatile#

Set all of CLKDIV’s bit fields.

(read-write) Clock divisor register for state machine N Frequency = clock freq / (CLKDIV_INT + CLKDIV_FRAC / 256)

inline uint8_t get_EXECCTRL_STATUS_N() volatile#

Get EXECCTRL’s STATUS_N field.

Comparison level for the MOV x, STATUS instruction

inline void set_EXECCTRL_STATUS_N(uint8_t value) volatile#

Set EXECCTRL’s STATUS_N field.

Comparison level for the MOV x, STATUS instruction

inline bool get_EXECCTRL_STATUS_SEL() volatile#

Get EXECCTRL’s STATUS_SEL bit.

Comparison used for the MOV x, STATUS instruction.

inline void set_EXECCTRL_STATUS_SEL() volatile#

Set EXECCTRL’s STATUS_SEL bit.

Comparison used for the MOV x, STATUS instruction.

inline void clear_EXECCTRL_STATUS_SEL() volatile#

Clear EXECCTRL’s STATUS_SEL bit.

Comparison used for the MOV x, STATUS instruction.

inline void toggle_EXECCTRL_STATUS_SEL() volatile#

Toggle EXECCTRL’s STATUS_SEL bit.

Comparison used for the MOV x, STATUS instruction.

inline uint8_t get_EXECCTRL_WRAP_BOTTOM() volatile#

Get EXECCTRL’s WRAP_BOTTOM field.

After reaching wrap_top, execution is wrapped to this address.

inline void set_EXECCTRL_WRAP_BOTTOM(uint8_t value) volatile#

Set EXECCTRL’s WRAP_BOTTOM field.

After reaching wrap_top, execution is wrapped to this address.

inline uint8_t get_EXECCTRL_WRAP_TOP() volatile#

Get EXECCTRL’s WRAP_TOP field.

After reaching this address, execution is wrapped to wrap_bottom. If the instruction is a jump, and the jump condition is true, the jump takes priority.

inline void set_EXECCTRL_WRAP_TOP(uint8_t value) volatile#

Set EXECCTRL’s WRAP_TOP field.

After reaching this address, execution is wrapped to wrap_bottom. If the instruction is a jump, and the jump condition is true, the jump takes priority.

inline bool get_EXECCTRL_OUT_STICKY() volatile#

Get EXECCTRL’s OUT_STICKY bit.

Continuously assert the most recent OUT/SET to the pins

inline void set_EXECCTRL_OUT_STICKY() volatile#

Set EXECCTRL’s OUT_STICKY bit.

Continuously assert the most recent OUT/SET to the pins

inline void clear_EXECCTRL_OUT_STICKY() volatile#

Clear EXECCTRL’s OUT_STICKY bit.

Continuously assert the most recent OUT/SET to the pins

inline void toggle_EXECCTRL_OUT_STICKY() volatile#

Toggle EXECCTRL’s OUT_STICKY bit.

Continuously assert the most recent OUT/SET to the pins

inline bool get_EXECCTRL_INLINE_OUT_EN() volatile#

Get EXECCTRL’s INLINE_OUT_EN bit.

If 1, use a bit of OUT data as an auxiliary write enable When used in conjunction with OUT_STICKY, writes with an enable of 0 will deassert the latest pin write. This can create useful masking/override behaviour due to the priority ordering of state machine pin writes (SM0 < SM1 < …)

inline void set_EXECCTRL_INLINE_OUT_EN() volatile#

Set EXECCTRL’s INLINE_OUT_EN bit.

If 1, use a bit of OUT data as an auxiliary write enable When used in conjunction with OUT_STICKY, writes with an enable of 0 will deassert the latest pin write. This can create useful masking/override behaviour due to the priority ordering of state machine pin writes (SM0 < SM1 < …)

inline void clear_EXECCTRL_INLINE_OUT_EN() volatile#

Clear EXECCTRL’s INLINE_OUT_EN bit.

If 1, use a bit of OUT data as an auxiliary write enable When used in conjunction with OUT_STICKY, writes with an enable of 0 will deassert the latest pin write. This can create useful masking/override behaviour due to the priority ordering of state machine pin writes (SM0 < SM1 < …)

inline void toggle_EXECCTRL_INLINE_OUT_EN() volatile#

Toggle EXECCTRL’s INLINE_OUT_EN bit.

If 1, use a bit of OUT data as an auxiliary write enable When used in conjunction with OUT_STICKY, writes with an enable of 0 will deassert the latest pin write. This can create useful masking/override behaviour due to the priority ordering of state machine pin writes (SM0 < SM1 < …)

inline uint8_t get_EXECCTRL_OUT_EN_SEL() volatile#

Get EXECCTRL’s OUT_EN_SEL field.

Which data bit to use for inline OUT enable

inline void set_EXECCTRL_OUT_EN_SEL(uint8_t value) volatile#

Set EXECCTRL’s OUT_EN_SEL field.

Which data bit to use for inline OUT enable

inline uint8_t get_EXECCTRL_JMP_PIN() volatile#

Get EXECCTRL’s JMP_PIN field.

The GPIO number to use as condition for JMP PIN. Unaffected by input mapping.

inline void set_EXECCTRL_JMP_PIN(uint8_t value) volatile#

Set EXECCTRL’s JMP_PIN field.

The GPIO number to use as condition for JMP PIN. Unaffected by input mapping.

inline bool get_EXECCTRL_SIDE_PINDIR() volatile#

Get EXECCTRL’s SIDE_PINDIR bit.

If 1, side-set data is asserted to pin directions, instead of pin values

inline void set_EXECCTRL_SIDE_PINDIR() volatile#

Set EXECCTRL’s SIDE_PINDIR bit.

If 1, side-set data is asserted to pin directions, instead of pin values

inline void clear_EXECCTRL_SIDE_PINDIR() volatile#

Clear EXECCTRL’s SIDE_PINDIR bit.

If 1, side-set data is asserted to pin directions, instead of pin values

inline void toggle_EXECCTRL_SIDE_PINDIR() volatile#

Toggle EXECCTRL’s SIDE_PINDIR bit.

If 1, side-set data is asserted to pin directions, instead of pin values

inline bool get_EXECCTRL_SIDE_EN() volatile#

Get EXECCTRL’s SIDE_EN bit.

If 1, the MSB of the Delay/Side-set instruction field is used as side-set enable, rather than a side-set data bit. This allows instructions to perform side-set optionally, rather than on every instruction, but the maximum possible side-set width is reduced from 5 to 4. Note that the value of PINCTRL_SIDESET_COUNT is inclusive of this enable bit.

inline void set_EXECCTRL_SIDE_EN() volatile#

Set EXECCTRL’s SIDE_EN bit.

If 1, the MSB of the Delay/Side-set instruction field is used as side-set enable, rather than a side-set data bit. This allows instructions to perform side-set optionally, rather than on every instruction, but the maximum possible side-set width is reduced from 5 to 4. Note that the value of PINCTRL_SIDESET_COUNT is inclusive of this enable bit.

inline void clear_EXECCTRL_SIDE_EN() volatile#

Clear EXECCTRL’s SIDE_EN bit.

If 1, the MSB of the Delay/Side-set instruction field is used as side-set enable, rather than a side-set data bit. This allows instructions to perform side-set optionally, rather than on every instruction, but the maximum possible side-set width is reduced from 5 to 4. Note that the value of PINCTRL_SIDESET_COUNT is inclusive of this enable bit.

inline void toggle_EXECCTRL_SIDE_EN() volatile#

Toggle EXECCTRL’s SIDE_EN bit.

If 1, the MSB of the Delay/Side-set instruction field is used as side-set enable, rather than a side-set data bit. This allows instructions to perform side-set optionally, rather than on every instruction, but the maximum possible side-set width is reduced from 5 to 4. Note that the value of PINCTRL_SIDESET_COUNT is inclusive of this enable bit.

inline bool get_EXECCTRL_EXEC_STALLED() volatile#

Get EXECCTRL’s EXEC_STALLED bit.

If 1, an instruction written to SMx_INSTR is stalled, and latched by the state machine. Will clear to 0 once this instruction completes.

inline void get_EXECCTRL(uint8_t &STATUS_N, bool &STATUS_SEL, uint8_t &WRAP_BOTTOM, uint8_t &WRAP_TOP, bool &OUT_STICKY, bool &INLINE_OUT_EN, uint8_t &OUT_EN_SEL, uint8_t &JMP_PIN, bool &SIDE_PINDIR, bool &SIDE_EN, bool &EXEC_STALLED) volatile#

Get all of EXECCTRL’s bit fields.

(read-write) Execution/behavioural settings for state machine N

inline void set_EXECCTRL(uint8_t STATUS_N, bool STATUS_SEL, uint8_t WRAP_BOTTOM, uint8_t WRAP_TOP, bool OUT_STICKY, bool INLINE_OUT_EN, uint8_t OUT_EN_SEL, uint8_t JMP_PIN, bool SIDE_PINDIR, bool SIDE_EN) volatile#

Set all of EXECCTRL’s bit fields.

(read-write) Execution/behavioural settings for state machine N

inline bool get_SHIFTCTRL_AUTOPUSH() volatile#

Get SHIFTCTRL’s AUTOPUSH bit.

Push automatically when the input shift register is filled, i.e. on an IN instruction which causes the input shift counter to reach or exceed PUSH_THRESH.

inline void set_SHIFTCTRL_AUTOPUSH() volatile#

Set SHIFTCTRL’s AUTOPUSH bit.

Push automatically when the input shift register is filled, i.e. on an IN instruction which causes the input shift counter to reach or exceed PUSH_THRESH.

inline void clear_SHIFTCTRL_AUTOPUSH() volatile#

Clear SHIFTCTRL’s AUTOPUSH bit.

Push automatically when the input shift register is filled, i.e. on an IN instruction which causes the input shift counter to reach or exceed PUSH_THRESH.

inline void toggle_SHIFTCTRL_AUTOPUSH() volatile#

Toggle SHIFTCTRL’s AUTOPUSH bit.

Push automatically when the input shift register is filled, i.e. on an IN instruction which causes the input shift counter to reach or exceed PUSH_THRESH.

inline bool get_SHIFTCTRL_AUTOPULL() volatile#

Get SHIFTCTRL’s AUTOPULL bit.

Pull automatically when the output shift register is emptied, i.e. on or following an OUT instruction which causes the output shift counter to reach or exceed PULL_THRESH.

inline void set_SHIFTCTRL_AUTOPULL() volatile#

Set SHIFTCTRL’s AUTOPULL bit.

Pull automatically when the output shift register is emptied, i.e. on or following an OUT instruction which causes the output shift counter to reach or exceed PULL_THRESH.

inline void clear_SHIFTCTRL_AUTOPULL() volatile#

Clear SHIFTCTRL’s AUTOPULL bit.

Pull automatically when the output shift register is emptied, i.e. on or following an OUT instruction which causes the output shift counter to reach or exceed PULL_THRESH.

inline void toggle_SHIFTCTRL_AUTOPULL() volatile#

Toggle SHIFTCTRL’s AUTOPULL bit.

Pull automatically when the output shift register is emptied, i.e. on or following an OUT instruction which causes the output shift counter to reach or exceed PULL_THRESH.

inline bool get_SHIFTCTRL_IN_SHIFTDIR() volatile#

Get SHIFTCTRL’s IN_SHIFTDIR bit.

1 = shift input shift register to right (data enters from left). 0 = to left.

inline void set_SHIFTCTRL_IN_SHIFTDIR() volatile#

Set SHIFTCTRL’s IN_SHIFTDIR bit.

1 = shift input shift register to right (data enters from left). 0 = to left.

inline void clear_SHIFTCTRL_IN_SHIFTDIR() volatile#

Clear SHIFTCTRL’s IN_SHIFTDIR bit.

1 = shift input shift register to right (data enters from left). 0 = to left.

inline void toggle_SHIFTCTRL_IN_SHIFTDIR() volatile#

Toggle SHIFTCTRL’s IN_SHIFTDIR bit.

1 = shift input shift register to right (data enters from left). 0 = to left.

inline bool get_SHIFTCTRL_OUT_SHIFTDIR() volatile#

Get SHIFTCTRL’s OUT_SHIFTDIR bit.

1 = shift out of output shift register to right. 0 = to left.

inline void set_SHIFTCTRL_OUT_SHIFTDIR() volatile#

Set SHIFTCTRL’s OUT_SHIFTDIR bit.

1 = shift out of output shift register to right. 0 = to left.

inline void clear_SHIFTCTRL_OUT_SHIFTDIR() volatile#

Clear SHIFTCTRL’s OUT_SHIFTDIR bit.

1 = shift out of output shift register to right. 0 = to left.

inline void toggle_SHIFTCTRL_OUT_SHIFTDIR() volatile#

Toggle SHIFTCTRL’s OUT_SHIFTDIR bit.

1 = shift out of output shift register to right. 0 = to left.

inline uint8_t get_SHIFTCTRL_PUSH_THRESH() volatile#

Get SHIFTCTRL’s PUSH_THRESH field.

Number of bits shifted into ISR before autopush, or conditional push (PUSH IFFULL), will take place. Write 0 for value of 32.

inline void set_SHIFTCTRL_PUSH_THRESH(uint8_t value) volatile#

Set SHIFTCTRL’s PUSH_THRESH field.

Number of bits shifted into ISR before autopush, or conditional push (PUSH IFFULL), will take place. Write 0 for value of 32.

inline uint8_t get_SHIFTCTRL_PULL_THRESH() volatile#

Get SHIFTCTRL’s PULL_THRESH field.

Number of bits shifted out of OSR before autopull, or conditional pull (PULL IFEMPTY), will take place. Write 0 for value of 32.

inline void set_SHIFTCTRL_PULL_THRESH(uint8_t value) volatile#

Set SHIFTCTRL’s PULL_THRESH field.

Number of bits shifted out of OSR before autopull, or conditional pull (PULL IFEMPTY), will take place. Write 0 for value of 32.

inline bool get_SHIFTCTRL_FJOIN_TX() volatile#

Get SHIFTCTRL’s FJOIN_TX bit.

When 1, TX FIFO steals the RX FIFO’s storage, and becomes twice as deep. RX FIFO is disabled as a result (always reads as both full and empty). FIFOs are flushed when this bit is changed.

inline void set_SHIFTCTRL_FJOIN_TX() volatile#

Set SHIFTCTRL’s FJOIN_TX bit.

When 1, TX FIFO steals the RX FIFO’s storage, and becomes twice as deep. RX FIFO is disabled as a result (always reads as both full and empty). FIFOs are flushed when this bit is changed.

inline void clear_SHIFTCTRL_FJOIN_TX() volatile#

Clear SHIFTCTRL’s FJOIN_TX bit.

When 1, TX FIFO steals the RX FIFO’s storage, and becomes twice as deep. RX FIFO is disabled as a result (always reads as both full and empty). FIFOs are flushed when this bit is changed.

inline void toggle_SHIFTCTRL_FJOIN_TX() volatile#

Toggle SHIFTCTRL’s FJOIN_TX bit.

When 1, TX FIFO steals the RX FIFO’s storage, and becomes twice as deep. RX FIFO is disabled as a result (always reads as both full and empty). FIFOs are flushed when this bit is changed.

inline bool get_SHIFTCTRL_FJOIN_RX() volatile#

Get SHIFTCTRL’s FJOIN_RX bit.

When 1, RX FIFO steals the TX FIFO’s storage, and becomes twice as deep. TX FIFO is disabled as a result (always reads as both full and empty). FIFOs are flushed when this bit is changed.

inline void set_SHIFTCTRL_FJOIN_RX() volatile#

Set SHIFTCTRL’s FJOIN_RX bit.

When 1, RX FIFO steals the TX FIFO’s storage, and becomes twice as deep. TX FIFO is disabled as a result (always reads as both full and empty). FIFOs are flushed when this bit is changed.

inline void clear_SHIFTCTRL_FJOIN_RX() volatile#

Clear SHIFTCTRL’s FJOIN_RX bit.

When 1, RX FIFO steals the TX FIFO’s storage, and becomes twice as deep. TX FIFO is disabled as a result (always reads as both full and empty). FIFOs are flushed when this bit is changed.

inline void toggle_SHIFTCTRL_FJOIN_RX() volatile#

Toggle SHIFTCTRL’s FJOIN_RX bit.

When 1, RX FIFO steals the TX FIFO’s storage, and becomes twice as deep. TX FIFO is disabled as a result (always reads as both full and empty). FIFOs are flushed when this bit is changed.

inline void get_SHIFTCTRL(bool &AUTOPUSH, bool &AUTOPULL, bool &IN_SHIFTDIR, bool &OUT_SHIFTDIR, uint8_t &PUSH_THRESH, uint8_t &PULL_THRESH, bool &FJOIN_TX, bool &FJOIN_RX) volatile#

Get all of SHIFTCTRL’s bit fields.

(read-write) Control behaviour of the input/output shift registers for state machine N

inline void set_SHIFTCTRL(bool AUTOPUSH, bool AUTOPULL, bool IN_SHIFTDIR, bool OUT_SHIFTDIR, uint8_t PUSH_THRESH, uint8_t PULL_THRESH, bool FJOIN_TX, bool FJOIN_RX) volatile#

Set all of SHIFTCTRL’s bit fields.

(read-write) Control behaviour of the input/output shift registers for state machine N

inline uint8_t get_ADDR() volatile#

Get ADDR’s ADDR field.

inline uint16_t get_INSTR() volatile#

Get INSTR’s INSTR field.

inline void set_INSTR(uint16_t value) volatile#

Set INSTR’s INSTR field.

inline uint8_t get_PINCTRL_OUT_BASE() volatile#

Get PINCTRL’s OUT_BASE field.

The lowest-numbered pin that will be affected by an OUT PINS, OUT PINDIRS or MOV PINS instruction. The data written to this pin will always be the least-significant bit of the OUT or MOV data.

inline void set_PINCTRL_OUT_BASE(uint8_t value) volatile#

Set PINCTRL’s OUT_BASE field.

The lowest-numbered pin that will be affected by an OUT PINS, OUT PINDIRS or MOV PINS instruction. The data written to this pin will always be the least-significant bit of the OUT or MOV data.

inline uint8_t get_PINCTRL_SET_BASE() volatile#

Get PINCTRL’s SET_BASE field.

The lowest-numbered pin that will be affected by a SET PINS or SET PINDIRS instruction. The data written to this pin is the least-significant bit of the SET data.

inline void set_PINCTRL_SET_BASE(uint8_t value) volatile#

Set PINCTRL’s SET_BASE field.

The lowest-numbered pin that will be affected by a SET PINS or SET PINDIRS instruction. The data written to this pin is the least-significant bit of the SET data.

inline uint8_t get_PINCTRL_SIDESET_BASE() volatile#

Get PINCTRL’s SIDESET_BASE field.

The lowest-numbered pin that will be affected by a side-set operation. The MSBs of an instruction’s side-set/delay field (up to 5, determined by SIDESET_COUNT) are used for side-set data, with the remaining LSBs used for delay. The least-significant bit of the side-set portion is the bit written to this pin, with more-significant bits written to higher-numbered pins.

inline void set_PINCTRL_SIDESET_BASE(uint8_t value) volatile#

Set PINCTRL’s SIDESET_BASE field.

The lowest-numbered pin that will be affected by a side-set operation. The MSBs of an instruction’s side-set/delay field (up to 5, determined by SIDESET_COUNT) are used for side-set data, with the remaining LSBs used for delay. The least-significant bit of the side-set portion is the bit written to this pin, with more-significant bits written to higher-numbered pins.

inline uint8_t get_PINCTRL_IN_BASE() volatile#

Get PINCTRL’s IN_BASE field.

The pin which is mapped to the least-significant bit of a state machine’s IN data bus. Higher-numbered pins are mapped to consecutively more-significant data bits, with a modulo of 32 applied to pin number.

inline void set_PINCTRL_IN_BASE(uint8_t value) volatile#

Set PINCTRL’s IN_BASE field.

The pin which is mapped to the least-significant bit of a state machine’s IN data bus. Higher-numbered pins are mapped to consecutively more-significant data bits, with a modulo of 32 applied to pin number.

inline uint8_t get_PINCTRL_OUT_COUNT() volatile#

Get PINCTRL’s OUT_COUNT field.

The number of pins asserted by an OUT PINS, OUT PINDIRS or MOV PINS instruction. In the range 0 to 32 inclusive.

inline void set_PINCTRL_OUT_COUNT(uint8_t value) volatile#

Set PINCTRL’s OUT_COUNT field.

The number of pins asserted by an OUT PINS, OUT PINDIRS or MOV PINS instruction. In the range 0 to 32 inclusive.

inline uint8_t get_PINCTRL_SET_COUNT() volatile#

Get PINCTRL’s SET_COUNT field.

The number of pins asserted by a SET. In the range 0 to 5 inclusive.

inline void set_PINCTRL_SET_COUNT(uint8_t value) volatile#

Set PINCTRL’s SET_COUNT field.

The number of pins asserted by a SET. In the range 0 to 5 inclusive.

inline uint8_t get_PINCTRL_SIDESET_COUNT() volatile#

Get PINCTRL’s SIDESET_COUNT field.

The number of MSBs of the Delay/Side-set instruction field which are used for side-set. Inclusive of the enable bit, if present. Minimum of 0 (all delay bits, no side-set) and maximum of 5 (all side-set, no delay).

inline void set_PINCTRL_SIDESET_COUNT(uint8_t value) volatile#

Set PINCTRL’s SIDESET_COUNT field.

The number of MSBs of the Delay/Side-set instruction field which are used for side-set. Inclusive of the enable bit, if present. Minimum of 0 (all delay bits, no side-set) and maximum of 5 (all side-set, no delay).

inline void get_PINCTRL(uint8_t &OUT_BASE, uint8_t &SET_BASE, uint8_t &SIDESET_BASE, uint8_t &IN_BASE, uint8_t &OUT_COUNT, uint8_t &SET_COUNT, uint8_t &SIDESET_COUNT) volatile#

Get all of PINCTRL’s bit fields.

(read-write) State machine pin control

inline void set_PINCTRL(uint8_t OUT_BASE, uint8_t SET_BASE, uint8_t SIDESET_BASE, uint8_t IN_BASE, uint8_t OUT_COUNT, uint8_t SET_COUNT, uint8_t SIDESET_COUNT) volatile#

Set all of PINCTRL’s bit fields.

(read-write) State machine pin control

Struct pio_sm

Contents

Struct pio_sm#

Struct Documentation#