Program Listing for File pio.h#
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#pragma once
#ifndef RP2040_STRUCTS_PIO_H
#define RP2040_STRUCTS_PIO_H
#include "../ifgen/common.h"
#include "pio_interrupt_cluster.h"
#include "pio_sm.h"
namespace RP2040
{
struct pio
{
/* Constant attributes. */
static constexpr struct_id_t id = 15;
static constexpr std::size_t size = 324;
/* Fields. */
uint32_t CTRL;
const uint32_t FSTAT = {};
uint32_t FDEBUG;
const uint32_t FLEVEL = {};
static constexpr std::size_t TXF_length = 4;
uint32_t TXF[TXF_length];
static constexpr std::size_t RXF_length = 4;
uint32_t
RXF[RXF_length];
uint32_t IRQ;
uint32_t IRQ_FORCE;
uint32_t INPUT_SYNC_BYPASS;
uint32_t DBG_PADOUT;
uint32_t DBG_PADOE;
const uint32_t DBG_CFGINFO = {};
static constexpr std::size_t INSTR_MEM_length = 32;
uint32_t
INSTR_MEM[INSTR_MEM_length];
static constexpr std::size_t SM_length = 4;
pio_sm SM[SM_length];
const uint32_t INTR = {};
static constexpr std::size_t IRQS_length = 2;
pio_interrupt_cluster IRQS[IRQS_length];
/* Methods. */
inline uint8_t get_CTRL_SM_ENABLE() volatile
{
return CTRL & 0xfu;
}
inline void set_CTRL_SM_ENABLE(uint8_t value) volatile
{
uint32_t curr = CTRL;
curr &= ~(0xfu);
curr |= (value & 0xfu);
CTRL = curr;
}
inline uint8_t get_CTRL_SM_RESTART() volatile
{
return (CTRL >> 4u) & 0xfu;
}
inline void set_CTRL_SM_RESTART(uint8_t value) volatile
{
uint32_t curr = CTRL;
curr &= ~(0xfu << 4u);
curr |= (value & 0xfu) << 4u;
CTRL = curr;
}
inline uint8_t get_CTRL_CLKDIV_RESTART() volatile
{
return (CTRL >> 8u) & 0xfu;
}
inline void set_CTRL_CLKDIV_RESTART(uint8_t value) volatile
{
uint32_t curr = CTRL;
curr &= ~(0xfu << 8u);
curr |= (value & 0xfu) << 8u;
CTRL = curr;
}
inline void get_CTRL(uint8_t &SM_ENABLE, uint8_t &SM_RESTART,
uint8_t &CLKDIV_RESTART) volatile
{
uint32_t curr = CTRL;
SM_ENABLE = curr & 0xfu;
SM_RESTART = (curr >> 4u) & 0xfu;
CLKDIV_RESTART = (curr >> 8u) & 0xfu;
}
inline void set_CTRL(uint8_t SM_ENABLE, uint8_t SM_RESTART,
uint8_t CLKDIV_RESTART) volatile
{
uint32_t curr = CTRL;
curr &= ~(0xfu);
curr |= (SM_ENABLE & 0xfu);
curr &= ~(0xfu << 4u);
curr |= (SM_RESTART & 0xfu) << 4u;
curr &= ~(0xfu << 8u);
curr |= (CLKDIV_RESTART & 0xfu) << 8u;
CTRL = curr;
}
inline uint8_t get_FSTAT_RXFULL() volatile
{
return FSTAT & 0xfu;
}
inline uint8_t get_FSTAT_RXEMPTY() volatile
{
return (FSTAT >> 8u) & 0xfu;
}
inline uint8_t get_FSTAT_TXFULL() volatile
{
return (FSTAT >> 16u) & 0xfu;
}
inline uint8_t get_FSTAT_TXEMPTY() volatile
{
return (FSTAT >> 24u) & 0xfu;
}
inline void get_FSTAT(uint8_t &RXFULL, uint8_t &RXEMPTY, uint8_t &TXFULL,
uint8_t &TXEMPTY) volatile
{
uint32_t curr = FSTAT;
RXFULL = curr & 0xfu;
RXEMPTY = (curr >> 8u) & 0xfu;
TXFULL = (curr >> 16u) & 0xfu;
TXEMPTY = (curr >> 24u) & 0xfu;
}
inline uint8_t get_FDEBUG_RXSTALL() volatile
{
return FDEBUG & 0xfu;
}
inline void set_FDEBUG_RXSTALL(uint8_t value) volatile
{
uint32_t curr = FDEBUG;
curr &= ~(0xfu);
curr |= (value & 0xfu);
FDEBUG = curr;
}
inline uint8_t get_FDEBUG_RXUNDER() volatile
{
return (FDEBUG >> 8u) & 0xfu;
}
inline void set_FDEBUG_RXUNDER(uint8_t value) volatile
{
uint32_t curr = FDEBUG;
curr &= ~(0xfu << 8u);
curr |= (value & 0xfu) << 8u;
FDEBUG = curr;
}
inline uint8_t get_FDEBUG_TXOVER() volatile
{
return (FDEBUG >> 16u) & 0xfu;
}
inline void set_FDEBUG_TXOVER(uint8_t value) volatile
{
uint32_t curr = FDEBUG;
curr &= ~(0xfu << 16u);
curr |= (value & 0xfu) << 16u;
FDEBUG = curr;
}
inline uint8_t get_FDEBUG_TXSTALL() volatile
{
return (FDEBUG >> 24u) & 0xfu;
}
inline void set_FDEBUG_TXSTALL(uint8_t value) volatile
{
uint32_t curr = FDEBUG;
curr &= ~(0xfu << 24u);
curr |= (value & 0xfu) << 24u;
FDEBUG = curr;
}
inline void get_FDEBUG(uint8_t &RXSTALL, uint8_t &RXUNDER, uint8_t &TXOVER,
uint8_t &TXSTALL) volatile
{
uint32_t curr = FDEBUG;
RXSTALL = curr & 0xfu;
RXUNDER = (curr >> 8u) & 0xfu;
TXOVER = (curr >> 16u) & 0xfu;
TXSTALL = (curr >> 24u) & 0xfu;
}
inline void set_FDEBUG(uint8_t RXSTALL, uint8_t RXUNDER, uint8_t TXOVER,
uint8_t TXSTALL) volatile
{
uint32_t curr = FDEBUG;
curr &= ~(0xfu);
curr |= (RXSTALL & 0xfu);
curr &= ~(0xfu << 8u);
curr |= (RXUNDER & 0xfu) << 8u;
curr &= ~(0xfu << 16u);
curr |= (TXOVER & 0xfu) << 16u;
curr &= ~(0xfu << 24u);
curr |= (TXSTALL & 0xfu) << 24u;
FDEBUG = curr;
}
inline uint8_t get_FLEVEL_TX0() volatile
{
return FLEVEL & 0xfu;
}
inline uint8_t get_FLEVEL_RX0() volatile
{
return (FLEVEL >> 4u) & 0xfu;
}
inline uint8_t get_FLEVEL_TX1() volatile
{
return (FLEVEL >> 8u) & 0xfu;
}
inline uint8_t get_FLEVEL_RX1() volatile
{
return (FLEVEL >> 12u) & 0xfu;
}
inline uint8_t get_FLEVEL_TX2() volatile
{
return (FLEVEL >> 16u) & 0xfu;
}
inline uint8_t get_FLEVEL_RX2() volatile
{
return (FLEVEL >> 20u) & 0xfu;
}
inline uint8_t get_FLEVEL_TX3() volatile
{
return (FLEVEL >> 24u) & 0xfu;
}
inline uint8_t get_FLEVEL_RX3() volatile
{
return (FLEVEL >> 28u) & 0xfu;
}
inline void get_FLEVEL(uint8_t &TX0, uint8_t &RX0, uint8_t &TX1,
uint8_t &RX1, uint8_t &TX2, uint8_t &RX2,
uint8_t &TX3, uint8_t &RX3) volatile
{
uint32_t curr = FLEVEL;
TX0 = curr & 0xfu;
RX0 = (curr >> 4u) & 0xfu;
TX1 = (curr >> 8u) & 0xfu;
RX1 = (curr >> 12u) & 0xfu;
TX2 = (curr >> 16u) & 0xfu;
RX2 = (curr >> 20u) & 0xfu;
TX3 = (curr >> 24u) & 0xfu;
RX3 = (curr >> 28u) & 0xfu;
}
inline uint8_t get_IRQ() volatile
{
return IRQ & 0xffu;
}
inline void set_IRQ(uint8_t value) volatile
{
uint32_t curr = IRQ;
curr &= ~(0xffu);
curr |= (value & 0xffu);
IRQ = curr;
}
inline void set_IRQ_FORCE(uint8_t value) volatile
{
uint32_t curr = IRQ_FORCE;
curr &= ~(0xffu);
curr |= (value & 0xffu);
IRQ_FORCE = curr;
}
inline uint8_t get_DBG_CFGINFO_FIFO_DEPTH() volatile
{
return DBG_CFGINFO & 0b111111u;
}
inline uint8_t get_DBG_CFGINFO_SM_COUNT() volatile
{
return (DBG_CFGINFO >> 8u) & 0xfu;
}
inline uint8_t get_DBG_CFGINFO_IMEM_SIZE() volatile
{
return (DBG_CFGINFO >> 16u) & 0b111111u;
}
inline void get_DBG_CFGINFO(uint8_t &FIFO_DEPTH, uint8_t &SM_COUNT,
uint8_t &IMEM_SIZE) volatile
{
uint32_t curr = DBG_CFGINFO;
FIFO_DEPTH = curr & 0b111111u;
SM_COUNT = (curr >> 8u) & 0xfu;
IMEM_SIZE = (curr >> 16u) & 0b111111u;
}
inline bool get_INTR_SM0_RXNEMPTY() volatile
{
return INTR & 1u;
}
inline bool get_INTR_SM1_RXNEMPTY() volatile
{
return INTR & (1u << 1u);
}
inline bool get_INTR_SM2_RXNEMPTY() volatile
{
return INTR & (1u << 2u);
}
inline bool get_INTR_SM3_RXNEMPTY() volatile
{
return INTR & (1u << 3u);
}
inline bool get_INTR_SM0_TXNFULL() volatile
{
return INTR & (1u << 4u);
}
inline bool get_INTR_SM1_TXNFULL() volatile
{
return INTR & (1u << 5u);
}
inline bool get_INTR_SM2_TXNFULL() volatile
{
return INTR & (1u << 6u);
}
inline bool get_INTR_SM3_TXNFULL() volatile
{
return INTR & (1u << 7u);
}
inline bool get_INTR_SM0() volatile
{
return INTR & (1u << 8u);
}
inline bool get_INTR_SM1() volatile
{
return INTR & (1u << 9u);
}
inline bool get_INTR_SM2() volatile
{
return INTR & (1u << 10u);
}
inline bool get_INTR_SM3() volatile
{
return INTR & (1u << 11u);
}
inline void get_INTR(bool &SM0_RXNEMPTY, bool &SM1_RXNEMPTY,
bool &SM2_RXNEMPTY, bool &SM3_RXNEMPTY,
bool &SM0_TXNFULL, bool &SM1_TXNFULL,
bool &SM2_TXNFULL, bool &SM3_TXNFULL, bool &SM0,
bool &SM1, bool &SM2, bool &SM3) volatile
{
uint32_t curr = INTR;
SM0_RXNEMPTY = curr & 1u;
SM1_RXNEMPTY = curr & (1u << 1u);
SM2_RXNEMPTY = curr & (1u << 2u);
SM3_RXNEMPTY = curr & (1u << 3u);
SM0_TXNFULL = curr & (1u << 4u);
SM1_TXNFULL = curr & (1u << 5u);
SM2_TXNFULL = curr & (1u << 6u);
SM3_TXNFULL = curr & (1u << 7u);
SM0 = curr & (1u << 8u);
SM1 = curr & (1u << 9u);
SM2 = curr & (1u << 10u);
SM3 = curr & (1u << 11u);
}
};
static_assert(sizeof(pio) == pio::size);
static_assert(ifgen_struct<pio>);
static volatile pio *const PIO0 = reinterpret_cast<pio *>(0x50200000);
static volatile pio *const PIO1 = reinterpret_cast<pio *>(0x50300000);
}; // namespace RP2040
#endif